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The italian version is on the  discussions page ^
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The italian version is on the  discussions page ^. open it in another browser tab to have this one side by side with the Italian version.
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 +
The idea is to translate it by heading and building it up as it goes. Italian phrases in italics (sic) are not translated yet.
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=Documentation and support tools=
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The description in the object is the result of the use of:
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* A Real Programma 101 of Museum Tecnologic@mente.
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* Original Function diagrams of the Programma 101.
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* Data base.
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* CAD simulator on PC.
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All documentation, including logic diagrams of the machine translated and simulated and the supporting material, is in electronic format and are available at the Museo – Laboratorio Tecnologic@mente of Ivrea.
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The understanding of this document is facilitated by the knowledge and use of all of the documentation and the simulator.
 +
 
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The description shows the result of simulation CAD diagrams of the functions described. The machine is simulated to all effects a translation of 1: 1 of a real P101. The "translation" was needed to adapt the technology, the P101 uses Resistor Transistor Logic (RTL), the simulator Diode Transistor Logic (DTL). ''Non è stata simulata la logica relativa alle segnalazioni di errore''.
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The simulated machine does not use the same logical components of P101, wich uses inverted logic: a TRUE is LOW and FALSE is HIGH. The main difference between P101 and simulator, is the working of the a flip flop. In the P101 masks are used in circuits without a transistor, which switch the flip flop at the falling edge of the signal. The simulator, on the other hand, uses logic gates working with on the signal level, mostly the rising edge.
 +
 
 +
In order to minimize the execution time of the simulation, the simulator follows the sequence of events but not the absolute values of the times of the P101.
 +
The names of the logic signals, used in the simulated machine, have the same meaning as those of the real P101. The difference between NOR logic (P101) and NAND (simulator), implies that the same function can be shown on the diagram in inverted form.
 +
In order to make it easier to read the printed symbol, the simulator uses a log to view binary code, OU [3: 0], not present in the P101.
 +
To present parallel data paths in the diagrams, the simulator uses the root of the name of the signal and exchanges a letter with a numerical value. For this reason, for example, the registers:

Versie van 31 dec 2014 16:42

The italian version is on the discussions page ^. open it in another browser tab to have this one side by side with the Italian version.

The idea is to translate it by heading and building it up as it goes. Italian phrases in italics (sic) are not translated yet.

Documentation and support tools

The description in the object is the result of the use of:

  • A Real Programma 101 of Museum Tecnologic@mente.
  • Original Function diagrams of the Programma 101.
  • Data base.
  • CAD simulator on PC.

All documentation, including logic diagrams of the machine translated and simulated and the supporting material, is in electronic format and are available at the Museo – Laboratorio Tecnologic@mente of Ivrea.

The understanding of this document is facilitated by the knowledge and use of all of the documentation and the simulator.

The description shows the result of simulation CAD diagrams of the functions described. The machine is simulated to all effects a translation of 1: 1 of a real P101. The "translation" was needed to adapt the technology, the P101 uses Resistor Transistor Logic (RTL), the simulator Diode Transistor Logic (DTL). Non è stata simulata la logica relativa alle segnalazioni di errore.

The simulated machine does not use the same logical components of P101, wich uses inverted logic: a TRUE is LOW and FALSE is HIGH. The main difference between P101 and simulator, is the working of the a flip flop. In the P101 masks are used in circuits without a transistor, which switch the flip flop at the falling edge of the signal. The simulator, on the other hand, uses logic gates working with on the signal level, mostly the rising edge.

In order to minimize the execution time of the simulation, the simulator follows the sequence of events but not the absolute values of the times of the P101. The names of the logic signals, used in the simulated machine, have the same meaning as those of the real P101. The difference between NOR logic (P101) and NAND (simulator), implies that the same function can be shown on the diagram in inverted form. In order to make it easier to read the printed symbol, the simulator uses a log to view binary code, OU [3: 0], not present in the P101. To present parallel data paths in the diagrams, the simulator uses the root of the name of the signal and exchanges a letter with a numerical value. For this reason, for example, the registers: