Olivetti Programma 101 Descrizione tecnico funzionale dell’elettronica Release 1.0 Ivrea 1 Giugno 2010 Gaiti GiulianoSommario Release 1.1 by members of the cctalk and cctech mailinglist winter 2014/2015 Simon Claessen Mazzini Alessandro ..put your name here..
Documentation and support tools
The description in the object is the result of the use of:
- A Real Programma 101 of Museum Tecnologic@mente.
- Original Function diagrams of the Programma 101.
- Data base.
- CAD simulator on PC.
All documentation, including logic diagrams of the machine translated and simulated and the supporting material, is in electronic format and are available at the Museo – Laboratorio Tecnologic@mente of Ivrea.
The understanding of this document is facilitated by the knowledge and use of all of the documentation and the simulator.
The description shows the result of simulation CAD diagrams of the functions described. The machine is simulated to all effects a translation of 1: 1 of a real P101. The "translation" was needed to adapt the technology, the P101 uses Resistor Transistor Logic (RTL), the simulator Diode Transistor Logic (DTL). Non è stata simulata la logica relativa alle segnalazioni di errore.
The simulated machine does not use the same logical components of P101, wich uses negated logic: a TRUE is LOW and FALSE is HIGH. The main difference between P101 and simulator, is the working of the a flip flop. In the P101 masks are used in circuits without a transistor, which switch the flip flop at the falling edge of the signal. The simulator, on the other hand, uses logic gates working with on the signal level, mostly the rising edge.
In order to minimize the execution time of the simulation, the simulator follows the sequence of events but not the absolute values of the times of the P101. The names of the logic signals, used in the simulated machine, have the same meaning as those of the real P101. The difference between NOR logic (P101) and NAND (simulator), implies that the same function can be shown on the diagram in inverted form. In order to make it easier to read the printed symbol, the simulator uses a log to view binary code, OU [3: 0], not present in the P101. To present parallel data paths in the diagrams, the simulator uses the root of the name of the signal and exchanges a letter with a numerical value. For this reason, for example, the registers:
|HH – HA||H[7:0].|
|HK – HM||C[2:0].|
|AA – AF||A[5:0].|
Technical functional Documentation
The following documents for the family P101, P102, P203 are currently available in electronic format:
- Manuale di programmazione P101
- P102 - P203 Connettore 50 contatti
- P203 Addendum descrizione tecnica
- Fogli logici :
- Fogli Logici P101
- Fogli Logici P102
- Fogli Logici P203
- Legenda dei fogli logici.doc
- Raccolta Circuiti Elettrici.doc
- CAD e Simulatore P101.doc
This documentation is structured in an Access database (already equipped with query and macro) and related data to be imported.
The material is all inside the folder "DB Source", and to use it you must follow the instructions described in the "Introduction to DB P101".
The folder contains:
- File Database for the Programma 101 family models
- Tables of special machines containing the complete list of signal generators
- P101 – T1 Segnali.xls
- P102 – T1 Segnali.xls
- P203 – T1 Segnali.xls
Note. Its better to view the files on a PC, so you can zoom in and out.
The programma 101 incorporates new experiences in the tradition of Olivetti (Ivrea). It was founded in 1965 by the integration of the emerging electronics with the refined mechanics, which at the time saw the first Electronic Laboratory reside in Pregnana Milanese (MI) and the second in Ivrea. Project leader was the late Ing. Pier Giorgio Perotto, hence the nickname "Perottina".
To understand the structure and algorithms of the Programma 101 one should be aware of the state of technology and relative costs of production in the years 1962-65, the developement period of his project. Logical technology is the Resistor-Transistor-Logic (RTL) Transistors, diodes, resistors and capacitors are not integrated yet.
Nel 1960 , l’Elea primo grande calcolatore a transistor, aveva i componenti montati su piastrini i quali a loro volta inseriti in “pacchi”. Pacchi e piastrini erano connessi per mezzo di filature.
With the RTL technique as used by the P101, a shiftregister of 8 bits needed at least 36 micro-modules. Summing up the parts used:
|N31 clock and data input||4||4||12||0||0||0|
|M04 flipflop switching masks||16||0||0||32||16||16|
Bearing in mind the price of the transistor was around 1,000 lire a piece, the production cost of our register (8 bits) approached the monthly salary of a worker, 40,000 Lires.
This explains the choice of the parallel data (1 bit) processing, in which extreme attention must be paid to the use of the same flip flop in different functions, such as data entry, printing or writing to memory card. The above design considerations are obtained at the expense of linearity and simplicity of the design.
(shouldn't that be serial in stead of parallel? Gebruiker:MacSimski )